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A Senior Package Design Engineer with extensive hands-on experience using Cadence APD/Allegro tools, experience with Ansys/AutoCAD and SI/PI Simulation tools will join a thriving Semiconductor scale-up enabling the build of scalable, energy efficient AI systems Worldwide.
The Senior Package Design Engineer will undertake all package design activities with cross functional team collaboration – delivering high speed interconnect systems; ensuring cost effective methodologies are incorporated, completing verification of electrical characteristics of the package and providing support to assembly related activities.
The Senior Package Design Engineer should possess the following:
* 5+ years’ Semiconductor Package design using Cadence APD/Allegro tools
* Expertise with Cadence (Virtuoso/Extract IM/Power DC) / Ansys SW tools.
* Using AutoCAD.
* Experience of IC physical layout.
* Minimum of Bachelors Electronic Engineering Degree.
* A basic understanding of Thermal and mechanical behaviour of IC Packages.
This exciting Semiconductor Company will offer a highly competitive salary package to the successful Senior Package Design EngineerDo not include the following in your job application, CV, or cover letter:
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Looking for your next career move? Join a top company hiring IC Package Design Engineer job near me in RG2, Shinfield, Wokingham! This is your chance to work on exciting projects, grow professionally, and enjoy a rewarding career with competitive pay and excellent benefits. Whether you're an experienced professional or looking to take the next step, this role offers the perfect opportunity to enhance your skills and make an impact. Don’t miss out—apply today via Vita CV and take your career to the next level!
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